1. Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods thereof. More particularly, the present invention relates to a power control transistor that has a vertical structure and a manufacturing method thereof.
2. Description of the Related Art
A power control transistor is used in a wide range of fields, such as household electrical appliances, railways, electric automobiles, and electric power. The power control transistor is required to have a high breakdown capability such that dielectric breakdown does not occur even when high power is applied. In addition, low on-state resistance is required to actualize low energy loss. Thus, in recent years, transistors that have a vertical structure are gaining attention as power control transistors.
In particular, a vertical transistor that has a GaN (gallium nitride)-based semiconductor layer is drawing attention because the GaN-based semiconductor has a high breakdown capability and a high mobility. The GaN-based semiconductor is a single crystal or a mixed crystal that includes, for example, at least one of GaN, aluminum nitride (AlN), and indium nitride (InN). Japanese Patent Application Publication No. 2003-51508 discloses a vertical FET that has the following GaN-based semiconductor layers (hereinafter referred to as first related art). A GaN-based semiconductor layer (cap layer) with a large bandgap is formed on a side surface of a GaN-based semiconductor layer (channel layer) having no impurities added. A gate electrode is formed on a side surface of the cap layer. The top and bottom of the channel layer are connected to a source electrode and a drain, respectively. The gate electrode controls the electrons that flow through the interface between the channel layer and the cap layer. Japanese Patent Application Publication No. 2003-163354 discloses another vertical FET that has a GaN-based semiconductor layer with the cap layer serving as an insulating film (hereinafter referred to as second related art).